JSRs: Java Specification Requests
JSR 2: Boundary-Scan API
Reason: Withdrawn at the request of the submitter.
JCP version in use: 1.0
Java Specification Participation Agreement version in use: 1.0
This API targeted the JavaCardTM platform so as to allow it to be usable on all available JavaTM virtual machines from the very smallest to the most sophisticated.
Please direct comments on this JSR to the Spec Lead(s)
Section 1: Identification
This specification request is submitted by:
Neil Jacobson Xilinx, 2100 Logic Drive, San Jose, CA 95124. E-mail: firstname.lastname@example.org Phone: 408 879 4885 Fax: 408 879 5171
Section 2: Request
This API is targeted to the JavaCardTM platform so as to allow it to be useable on all available Java VM's from the very smallest to the most sophisticated. It is important to note that only the JavaCard VM is require and not the associated API. It is not expected that the Java API for Boundary-Scan would ever run on a smart card. It is true, however, that it could be hosted on an 8 bit or simpler microprocessor just like those used on smart cards.
IEEE Std 1149.1 is an internationally recognized and widely utilized communications protocol used to facilitate electronic systems test, debug and configuration. It is typical that this protocol is used throughout an electronic system's life cycle. At each step in the product's life cycle, it usual for the test, debug or configuration program to be run on a different applications platform (PC, workstation, automatic test equipment or embedded processor). In addition, a burgeoning application for this protocol is the utilization of it to enable debug and reconfiguration of electronic systems that are not physically accessible but are network connected.
Obviously, the write once, run anywhere capabilities of Java address the multi-platform requirement of this applications space. The available network class libraries of more sophisticated Java platforms allow for turnkey remote access support.
The nature of the IEEE Std 1149.1 protocol demands that 4 (or optionally 5) pins known as the Test Access Port (TAP) on each compliant electrical system is controlled. Because the access and control of the TAP is both system and platform dependent it is recommended that the control interface be implemented using native methods.
Section 3: Contributions
Section 4: Additional Information
Here is an example boundary-scan application created by Xilinx that you can download and use.